File:Hi speed link layout.jpg
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FPGA high speed link buffer gate layout
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 03:20, 3 April 2013 | | 794 × 1,123 (101 KB) | Rapatan (talk | contribs) | FPGA high speed link buffer gate layout |
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