Re: RAMPS for Due! December 11, 2013 05:04PM |
Registered: 12 years ago Posts: 1,236 |
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Cefiar
If you include wireless options, then there is the DigiX. Mine is apparently in the post somewhere.
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Re: EtherDue - Yes still "coming soon". I help out on the Freetronics forum so I will be trying to get my hands on one to see if it can be used with the RAMPS-FD. Big issue will be the height of the Ethernet socket, but another row of headers should be able to solve that.
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Q: Did anyone get around to trying RAMPS-FD on a Mega? I know I was going to try this, but between work and travel, I've had bugger all time to do it. While I know it's not really the goal, if it works on both that definitely means that firmware won't stop boards being sent out and used by people (and it'd be nice to have an alternative to RAMPS that I can point people at).
Re: RAMPS for Due! December 11, 2013 05:16PM |
Registered: 10 years ago Posts: 91 |
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bobc
In practice all that is really needed is some concept of cooperative multitasking and event driven architectures, which is really bread and butter stuff for embedded programmers.
Re: RAMPS for Due! December 11, 2013 09:06PM |
Registered: 10 years ago Posts: 1,433 |
Re: RAMPS for Due! December 12, 2013 09:07PM |
Registered: 10 years ago Posts: 91 |
Re: RAMPS for Due! December 12, 2013 11:49PM |
Admin Registered: 13 years ago Posts: 7,000 |
Re: RAMPS for Due! December 13, 2013 02:02AM |
Registered: 14 years ago Posts: 1,092 |
Re: RAMPS for Due! December 13, 2013 11:43AM |
Registered: 10 years ago Posts: 91 |
Re: RAMPS for Due! December 13, 2013 04:20PM |
Registered: 10 years ago Posts: 1,433 |
Re: RAMPS for Due! December 13, 2013 05:09PM |
Registered: 14 years ago Posts: 1,092 |
Re: RAMPS for Due! December 13, 2013 08:37PM |
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Re: RAMPS for Due! December 13, 2013 11:41PM |
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Re: RAMPS for Due! December 14, 2013 06:11AM |
Registered: 12 years ago Posts: 1,236 |
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uncle_bob
If you can, go for a pull down that's less than 1K ohms. It still won't pull enough to bother the regulator. The lower you go, the less likely odd events are to turn on the FET's.
Re: RAMPS for Due! December 14, 2013 09:32AM |
Registered: 10 years ago Posts: 1,433 |
Re: RAMPS for Due! December 14, 2013 10:19AM |
Registered: 10 years ago Posts: 91 |
Re: RAMPS for Due! December 14, 2013 03:24PM |
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Re: RAMPS for Due! December 14, 2013 04:28PM |
Registered: 12 years ago Posts: 1,236 |
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uncle_bob
Going through the schematic, I'm having a tough time finding the supply and ground connections for U1 and U2. I'm going by the pdf version, so it may be a bit out of date....
Re: RAMPS for Due! December 14, 2013 07:38PM |
Registered: 14 years ago Posts: 1,092 |
Re: RAMPS for Due! December 15, 2013 11:59AM |
Registered: 10 years ago Posts: 1,433 |
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bobc
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uncle_bob
Going through the schematic, I'm having a tough time finding the supply and ground connections for U1 and U2. I'm going by the pdf version, so it may be a bit out of date....
Those are hidden pins which automatically connect to VCC and GND. You can toggle display of these in the schematic editor.
Re: RAMPS for Due! December 15, 2013 01:10PM |
Registered: 12 years ago Posts: 1,236 |
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uncle_bob
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bobc
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uncle_bob
Going through the schematic, I'm having a tough time finding the supply and ground connections for U1 and U2. I'm going by the pdf version, so it may be a bit out of date....
Those are hidden pins which automatically connect to VCC and GND. You can toggle display of these in the schematic editor.
.... which works less well in the pdf version..
Are those two chips running off of +3.3 or +5V? I'd guess U2 is 3.3, but U1 might be something else. If so a 74HCT part might be a better thing to use.
Re: RAMPS for Due! December 15, 2013 06:09PM |
Registered: 10 years ago Posts: 1,433 |
Re: RAMPS for Due! December 15, 2013 08:28PM |
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Re: RAMPS for Due! December 16, 2013 01:32PM |
Registered: 10 years ago Posts: 91 |
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Cefiar
ambrop7: E0-Dir and Z-Min run next to each other, and are on the bottom of the board, next to Pin 21 of the Due.
Can you check that they actually put those tracks on the board (it's possible they removed them accidentally), or that they haven't been damaged somehow by their manufacturing process?
If this is caused by them putting in too large a hole, I suspect other issues as well, such as Y-Min (on the other side of the hole) and Therm-2 (top of board).
If you can confirm there's an issue, I'll see what I can do to re-route these tracks and clean up some more space around the hole. Being exceedingly close in our tolerances around things like holes is a sure way to lead to problems. I'll probably just see what I can do anyway, but if we can definitely confirm that is an issue I'll bump it up my priority list.
Re: RAMPS for Due! December 16, 2013 02:00PM |
Registered: 10 years ago Posts: 91 |
Re: RAMPS for Due! December 16, 2013 03:35PM |
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Re: RAMPS for Due! December 16, 2013 03:46PM |
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Re: RAMPS for Due! December 16, 2013 03:55PM |
Registered: 10 years ago Posts: 91 |
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Cefiar
That said, the pull-ups/pull-downs are supposed to kick in when the tristate buffers are "disconnected" in Z mode, so I'm guessing that the tristate buffers are actually somehow loading their outputs when they're not powered.
Re: RAMPS for Due! December 16, 2013 04:16PM |
Registered: 14 years ago Posts: 1,092 |
Re: RAMPS for Due! December 16, 2013 04:29PM |
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Re: RAMPS for Due! December 16, 2013 04:50PM |
Registered: 12 years ago Posts: 1,236 |
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Cefiar
Actually the pull-up in most cases goes to the +VGATE line, which will definitely drive the FETs.
I think we may need to bite the bullet and either switch to P-channel FET's in place of the DMN2075U's, or go for a proper gate driver.
Re: RAMPS for Due! December 16, 2013 07:16PM |
Registered: 14 years ago Posts: 1,092 |
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bobc
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Cefiar
Actually the pull-up in most cases goes to the +VGATE line, which will definitely drive the FETs.
I think we may need to bite the bullet and either switch to P-channel FET's in place of the DMN2075U's, or go for a proper gate driver.
uncle_bob gives me a thought. If we used HCT logic for the buffers and drive them from 5V, they will output 5V and accept either 3.3V or 5V as input. The advantage is that we may be able to drive the big FETs directly, and more importantly drive them with positive logic. That means we can pull the gates to 0V, so if 3V or 5V are not present the FETs will be off.