Gen 7 pin allocations July 12, 2011 01:44AM |
Registered: 14 years ago Posts: 24 |
Re: Gen 7 pin allocations July 12, 2011 03:59AM |
Registered: 13 years ago Posts: 7,616 |
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Looking at the pin usage it seems there are some pins used for limit switches that will interfere with the SD card's SPI interface.
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Finally what is the fan output used for?
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Does anyone know any reason for not allocating these pins to my desired extra functions.
Generation 7 Electronics | Teacup Firmware | RepRap DIY |
Re: Gen 7 pin allocations September 11, 2011 03:05PM |
Registered: 12 years ago Posts: 16 |
Re: Gen 7 pin allocations September 12, 2011 03:18AM |
Registered: 13 years ago Posts: 7,616 |
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Myke Predko has solved LCD connection using only 2 wire:
[www.rentron.com]
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3. I recommend to add GND and VCC to that currently unused extension header (pins 16-20 of CPU).
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Also tracks and pins for LM7805 regulator would be nice to have at least as option
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I mean that +5V for stepper controllers could also be alive all the time
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6. Also MOSFET gates needs to have pulldown resistors
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Attachments:
Generation 7 Electronics | Teacup Firmware | RepRap DIY |
Re: Gen 7 pin allocations September 12, 2011 05:58AM |
Re: Gen 7 pin allocations September 12, 2011 11:13AM |
Registered: 12 years ago Posts: 16 |
Re: Gen 7 pin allocations September 13, 2011 07:10AM |
Registered: 13 years ago Posts: 7,616 |
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Your example of SD card pins sharing (or what), does it mean that both processors (if stacked card has a processor) could or should controll same SD card? That sounds not good.
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Concerning second stepper: could it be best if original Z stepper is reconfigured to drive that second extruder?
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If SDRAM is possible to get operational using MISO, MOSI, SCK and maybe pin 40 for CS (has anybody done it yet?)
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> You apparently moved miscrostepping jumpers more
> to the top, between Pololus and motor connectors.
No, those 4 pin rows are for optional pin strip stepper connectors just like RAMPS had.
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Half stepping is lost. Does anybody really uses it?
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On that scheme also termistor exitation is feeded from AVCC
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That attached PCB planning idea was routed using 32 mills tracks and about 22-25 mills clearings.
Generation 7 Electronics | Teacup Firmware | RepRap DIY |
Re: Gen 7 pin allocations September 20, 2011 01:27PM |
Registered: 12 years ago Posts: 16 |
Re: Gen 7 pin allocations September 20, 2011 02:30PM |
Registered: 13 years ago Posts: 1,352 |
Re: Gen 7 pin allocations September 20, 2011 05:23PM |
Registered: 12 years ago Posts: 16 |
Re: Gen 7 pin allocations September 20, 2011 06:08PM |
Registered: 13 years ago Posts: 1,352 |
Re: Gen 7 pin allocations September 15, 2012 07:21AM |
Registered: 11 years ago Posts: 121 |
Re: Gen 7 pin allocations September 16, 2012 05:03AM |
Registered: 13 years ago Posts: 7,616 |
Generation 7 Electronics | Teacup Firmware | RepRap DIY |
Re: Gen 7 pin allocations September 17, 2012 10:11AM |
Registered: 11 years ago Posts: 121 |
Re: Gen 7 pin allocations September 18, 2012 05:58AM |
Registered: 13 years ago Posts: 7,616 |
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If you'd prefer, I can open a new thread with my suggestions?
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Rather than forking, it makes more sense to incorporate changes.
- AVR-CDC for USB-TTL (I have a tested working implementation)
Generation 7 Electronics | Teacup Firmware | RepRap DIY |
Re: Gen 7 pin allocations September 18, 2012 06:16AM |
Registered: 11 years ago Posts: 121 |
Re: Gen 7 pin allocations September 18, 2012 08:08AM |
Registered: 13 years ago Posts: 7,616 |
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The ATtiny 45 only supports 4800 Baud.
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it's in Eagle
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Personally I vote for integrate
Generation 7 Electronics | Teacup Firmware | RepRap DIY |
Re: Gen 7 pin allocations September 18, 2012 08:12AM |
Registered: 11 years ago Posts: 121 |